In some of semiconductor devices in which a double-diffused MOSFET (DMOS) of a vertical structure is formed in a cell region, a high breakdown voltage layer in an outer peripheral region that surrounds an outer periphery of the cell region is formed of only an n− type epitaxial layer with a low impurity concentration. In the semiconductor device of this type, injected charge (injected carriers) is discharged linearly from the n− type epitaxial layer toward a contact portion with a source electrode in a p type body layer in the recovery operation of the DMOS.
In another semiconductor device in which a DMOS of a vertical structure is formed in a cell region, a high breakdown voltage structure of an outer peripheral region located at an outer periphery of the cell region is formed of a p type surface field relaxation (resurf) layer relatively high in concentration to ensure a high breakdown voltage in the p type resurf layer. Thus, when the DMOS formed in the cell region has a trench gate type, an end of the trench gate on a most outer peripheral side is covered with the p type resurf layer.
On the other hand, in a semiconductor device in which a MOSFET of an SJ structure is formed in a cell region, as with the cell region in which the MOSFET is formed, a high breakdown voltage layer of an outer peripheral region is also formed of a PN column in which p type columns and n type columns are alternatively repeated (for example, refer to PTL 1 and PTL 2). Thus, in the recovery operation of the MOSFET of the SJ structure, an injected charge is discharged toward a contact portion with a source electrode in a p type body layer through the PN columns. In the outer peripheral region in which the SJ structure is provided, the high breakdown voltage can be held in the SJ structure. Therefore, the p type resurf layer provided in the outer peripheral region also has no need to be high in concentration, and the trench gate is not also covered with the p type resurf layer.